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HGPU group<p>Mixed-precision finite element kernels and assembly: Rounding error analysis and hardware acceleration</p><p><a href="https://mast.hpc.social/tags/Intel" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Intel</span></a> <a href="https://mast.hpc.social/tags/AVX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX</span></a> <a href="https://mast.hpc.social/tags/MixedPrecision" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>MixedPrecision</span></a> <a href="https://mast.hpc.social/tags/FEM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FEM</span></a> <a href="https://mast.hpc.social/tags/Package" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Package</span></a></p><p><a href="https://hgpu.org/?p=29481" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="">hgpu.org/?p=29481</span><span class="invisible"></span></a></p>
Cory Doctorow<p>Spanish colonial ATC</p><p><a href="https://mamot.fr/tags/AirTrafficControl" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AirTrafficControl</span></a> <a href="https://mamot.fr/tags/CatalinaIsland" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>CatalinaIsland</span></a> <a href="https://mamot.fr/tags/AirportInTheSky" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AirportInTheSky</span></a> <a href="https://mamot.fr/tags/AVX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX</span></a></p>
Benjamin Carr, Ph.D. 👨🏻‍💻🧬<p><a href="https://hachyderm.io/tags/RedHat" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RedHat</span></a> Evaluating x86-64-v3 Requirement For <a href="https://hachyderm.io/tags/RHEL10" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RHEL10</span></a><br><a href="https://hachyderm.io/tags/RHEL" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RHEL</span></a> 9 requires <a href="https://hachyderm.io/tags/x86_64_v2" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>x86_64_v2</span></a> while for Red Hat <a href="https://hachyderm.io/tags/EnterpriseLinux" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>EnterpriseLinux</span></a> 10 they are looking at upping things to <a href="https://hachyderm.io/tags/x86_64_v3" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>x86_64_v3</span></a> that would basically mandate <a href="https://hachyderm.io/tags/Intel" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Intel</span></a> and <a href="https://hachyderm.io/tags/AMD" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AMD</span></a> <a href="https://hachyderm.io/tags/CPU" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>CPU</span></a> with <a href="https://hachyderm.io/tags/AVX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX</span></a>/#AVX2 support. This roughly translates to Haswell era processors or AMD Excavator era CPUs and newer. Plus x86-64-v3 also mandates FMA, VEX encoding, and others that can potentially help with performance when able to unconditionally target x86-64-v3<br><a href="https://www.phoronix.com/news/RedHat-RHEL10-x86-64-v3-Explore" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">phoronix.com/news/RedHat-RHEL1</span><span class="invisible">0-x86-64-v3-Explore</span></a></p>
FCLC<p>Hi friends! Very excited to announce that I'll be giving an <span class="h-card" translate="no"><a href="https://mast.hpc.social/@easybuild" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>easybuild</span></a></span> Tech Talk on the 13th of October on <a href="https://mast.hpc.social/tags/AVX10" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX10</span></a>!</p><p>The Talk is titled "AVX10 for HPC:<br>A reasonable solution to the 7 levels of AVX-512 folly" </p><p>Registration is free, all <a href="https://mast.hpc.social/tags/x86" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>x86</span></a>, <a href="https://mast.hpc.social/tags/AVX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX</span></a>, <a href="https://mast.hpc.social/tags/AVX512" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AVX512</span></a>, <a href="https://mast.hpc.social/tags/SIMD" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>SIMD</span></a>, and <a href="https://mast.hpc.social/tags/HPC" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>HPC</span></a> experience levels welcome!</p><p>The page is here: <a href="https://easybuild.io/tech-talks/008_avx10.html" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">easybuild.io/tech-talks/008_av</span><span class="invisible">x10.html</span></a></p><p>And you can register here! <a href="https://event.ugent.be/registration/ebtechtalk008avx10" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">event.ugent.be/registration/eb</span><span class="invisible">techtalk008avx10</span></a></p>